Rapidly increasing demand for small, handheld electronic devices is driving the need for low-power integrated circuit design. Moore's law has far outpaced increases in battery energy densities, requiring fundamental changes in transistor-level circuit structure and process technology to increase power efficiency. System on a Chip (SoC) designs require low-power analog, RF, and digital VLSI circuits. This introduces many new challenges in designing low-power circuits that meet speed, accuracy, and noise requirements.