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Title
|
Authors
|
Issue |
A
5-GHz direct-conversion CMOS transceiver
|
Pengfei
Zhang; Thai Nguyen; Lam, C.; Gambetta, D.; Soorapanth, T.; Baohong
Cheng; Hart, S.; Sever, I.; Bourdi, T.; Tham, A.; Razavi, B. |
DEC
03
IEEE
Xplore |
| A
5-GHz direct-conversion CMOS transceiver utilizing automatic frequency
control for the IEEE 802.11a wireless LAN standard |
Behzad,
A.R.; Zhong Ming Shi; Anand, S.B.; Li Lin; Carter, K.A.; Kappes,
M.S.; Tsung-Hsien Lin; Thinh Nguyen; Yuan, D.; Wu, S.; Wong, Y.C.;
Fong, V.; Rofougaran, A. |
DEC
03
IEEE
Xplore |
| Broadband
ESD protection circuits in cmos technology |
Galal,
S.; Razavi, B. |
DEC
03
IEEE
Xplore |
| A
69-mW 10-bit 80-MSample/s pipelined CMOS ADC |
Byung-Moo
Min; Kim, P.; Bowman, F.W.; Boisvert, D.M.; Aude, A.J.
|
DEC
03
IEEE
Xplore |
| A
40-Gb/s clock and data recovery circuit in 0.18-micron CMOS technology |
Jri
Lee; Razavi, B.
|
DEC
03
IEEE
Xplore |
| A
12-bit 75-MS/s pipelined ADC using open-loop residue amplification |
Murmann,
B.; Boser, B.E. |
DEC
03
IEEE
Xplore |
Self-biased
high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL
|
Maneatis,
J.G.; Kim, J.; McClatchie, I.; Maxey, J.; Shankaradas, M.; |
Nov
03
IEEE
Xplore |
A
low-power adaptive bandwidth PLL and clock buffer with supply-noise
compensation
|
Mansuri,
M.; Yang, C.-K.K.; |
Nov
03
IEEE
Xplore |
| Guest
editorial [Special issue of the digital, memory, and signal processing
sessions of the 2003 ISSCC] |
Segars,
S.; Sheikholeslami, A.; Fischer, S.; |
NOV
03
IEEE
Xplore |
A
10-GHz global clock distribution using coupled standing-wave oscillators
|
O'Mahony,
F.; Yue, C.P.; Horowitz, M.A.; Wong, S.S.; |
NOV
03
IEEE
Xplore |
Low-power
fully integrated 10-Gb/s SONET/SDH transceiver in 0.13-micron CMOS
|
Henrickson,
L.; Shen, D.; Nellore, U.; Ellis, A.; Joong Oh; Hui Wang; Capriglione,
G.; Atesoglu, A.; Yang, A.; Wu, P.; Quadri, S.; Crosbie, D.; |
Oct
03
IEEE
Xplore |
| Product
applications and technology directions with SiGe BiCMOS |
Joseph,
A.J.; Dunn, J.; Freeman, G.; Harame, D.L.; Coolbaugh, D.; Groves,
R.; Stein, K.J.; Volant, R.; Subbanna, S.; Marangos, V.S.; Onge,
S.S.; Eshun, E.; Cooper, P.; Johnson, J.B.; Jae-Sung Rieh; Jagannathan,
B.; Ramachandran, V.; Ahlgren, D.; Dawn Wang; Wang, X.; |
Sep
03
IEEE
Xplore |
| A
highly integrated dual-band triple-mode transmit IC for cellular
CDMA2000 applications |
Aggarwal,
S.; Daanen, A.; Locher, M.; Landesman, A.L.; Judson, M.; Garrigues,
F.; Bracey, M.; Haiming Xu; Charlon, O.; Minzhan Gao |
Sep
03
IEEE
Xplore |
|
A 2.4-GHz
0.18-micron CMOS self-biased cascode power amplifier
|
Sowlati,
T.; Leenaerts, D.M.W |
AUG
03
IEEE
Xplore |
Large-signal
analysis of MOS varactors in CMOS -G/sub m/ LC VCOs
|
Bunch,
R.L.; Raman, S |
AUG
03
IEEE
Xplore |
| A
direct-conversion receiver IC for WCDMA mobile systems |
Reynolds,
S.K.; Floyd, B.A.; Beukema, T.; Zwick, T.; Pfeiffer, U.; Ainspan,
H.; |
Sep
03
IEEE
Xplore |
|
A low-power
2.4-GHz transmitter/receiver CMOS IC
|
Zolfaghari,
A.; Razavi, B.
|
Feb
03
IEEE
Xplore |
Understanding
MOSFET mismatch for analog design
|
Drennan,
P.G.; McAndrew, C.C.
|
Mar
03
IEEE
Xplore |
| Full-CMOS
2-GHz WCDMA direct conversion transmitter and receiver |
Kang-Yoon
Lee; Seung-Wook Lee; Yido Koo; Hyoung-Ki Huh; Hee-Young Nam; Jeong-Woo
Lee; Joonbae Park; Kyeongho Lee; Deog-Kyoon Jeong; Wonchan Kim |
Jan
03
IEEE
Xplore |
A
10-gb/s CMOS clock and data recovery circuit with a half-rate binary
phase/frequency detector
|
Savoj,
J.; Razavi, B. |
Jan
03
IEEE
Xplore |
| High-performance
and power-efficient CMOS comparators |
Chung-Hsun
Huang; Jinn-Shyan Wang |
Feb
03
IEEE
Xplore |
A
1.8-GHz CMOS fractional-N frequency synthesizer with randomized
multiphase VCO
|
Chun-Huat
Heng; Bang-Sup Song |
June
03
IEEE
Xplore |
Design
of wide-band CMOS VCO for multiband wireless LAN applications
|
Fong,
N.H.W.; Plouchart, J.-O.; Zamdmer, N.; Duixian Liu; Wagner, L.F.;
Plett, C.; Tarr, N.G.; |
AUG
03
IEEE
Xplore |
|
Jitter transfer
characteristics of delay-locked loops - theories and design techniques
|
Lee, M.-J.E.;
Dally, W.J.; Greer, T.; Hiok-Tiaq Ng; Farjad-Rad, R.; Poulton,
J.; Senthinathan, R.
|
APR
03
IEEE
Xplore |
| A
stabilization technique for phase-locked frequency synthesizers |
Tai-Cheng
Lee; Razavi, B. |
June
03
IEEE
Xplore |
A
single-chip multimode receiver for GSM900, DCS1800, PCS1900, and
WCDMA
|
Ryynanen,
J.; Kivekas, K.; Jussila, J.; Sumanen, L.; Parssinen, A.; Halonen,
K.A.I. |
APR
03
IEEE
Xplore |
A
5-GHz CMOS transceiver for IEEE 802.11a wireless LAN systems
|
Zargari,
M. Su, D.K. Yue, C.P. Rabii, S. Weber, D. Kaczynski, B.J. Mehta,
S.S. Singh, K. Mendis, S. Wooley, B.A. |
Dec
2002
IEEE
Xplore |
| A
merged CMOS LNA and mixer for a WCDMA receiver |
Sjoland,
H.; Karimi-Sanjaani, A.; Abidi, A.A.
|
June
03
IEEE
Xplore |
|
A 2.4-GHz
0.18-micron CMOS self-biased cascode power amplifier
|
Sowlati,
T.; Leenaerts, D.M.W |
AUG
03
IEEE
Xplore |
Self-biased
high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL
|
Maneatis, J.G.; Kim, J.; McClatchie, I.;
Maxey, J.; Shankaradas, M.; |
Nov
03
IEEE
Xplore |
A
3-v, 0.35-micron CMOS bluetooth receiver IC
|
Wenjun
Sheng; Bo Xia; Emira, A.E.; Chunyu Xin; Valero-Lopez, A.Y.; Sung
Tae Moon; Sanchez-Sinencio, E.
|
Jan
03
IEEE
Xplore |
A
2-GHz CMOS image-reject receiver with LMS calibration
|
Der,
L.; Razavi, B. |
Feb
03
IEEE
Xplore |
An
all-digital phase-locked loop for high-speed clock generation
|
Ching-Che
Chung; Chen-Yi Lee |
Feb
03
IEEE
Xplore |
A
low-power adaptive bandwidth PLL and clock buffer with supply-noise
compensation
|
Mansuri, M.; Yang, C.-K.K.; |
Nov
03
IEEE
Xplore |
| A
fast switching PLL frequency synthesizer with an on-chip passive
discrete-time loop filter in 0.25-micron CMOS |
Zhang,
B.; Allen, P.E.; Huard, J.M.
|
June
03
IEEE
Xplore |
A
1-V transformer-feedback low-noise amplifier for 5-GHz wireless
LAN in 0.18-micron CMOS
|
Cassan,
D.J.; Long, J.R. |
Mar
03
IEEE
Xplore |
| Varactor
characteristics, oscillator tuning curves, and AM-FM conversion |
Hegazi,
E.; Abidi, A.A.
|
June
03
IEEE
Xplore |
| A
2.4-GHz monolithic fractional-N frequency synthesizer with robust
phase-switching prescaler and loop capacitance multiplier |
Keliu
Shu; Sanchez-Sinencio, E.; Silva-Martinez, J.; Embabi, S.H.K. |
June
03
IEEE
Xplore |
| A highly integrated analog front-end for
3G |
Khalil, W.; Tsung-Yuan Chang; Xuewen Jiang;
Naqvi, S.R.; Nikjou, B.; James Tseng; |
May
03
IEEE
Xplore |
| A low-phase-noise 5-GHz CMOS quadrature
VCO using superharmonic coupling |
Gierkink, S.L.J.; Levantino, S.; Frye,
R.C.; Samori, C.; Boccuzzi, V.; |
July
03
IEEE Xplore |
| A low-power CMOS Bluetooth RF transceiver
with a digital offset canceling DLL-based GFSK demodulator |
Sangjin Byun; Chan-Hong Park; Yongchul
Song; Sungho Wang; Conroy, C.S.G.; Beomsup Kim; |
Oct
03
IEEE
Xplore |
